Hierarchical PCE architecture

In the Hierarchical PCE architecture child PCE's report to a parent PCE responsible to gather necessary information for an end-to-end LSP calculation not limited by a predetermined domain sequence. The parent PCE knows a topology map of the child domains and their respective child PCEs, the domains are seen as vertex and the links between border nodes at each domain (also known by the parent PCE) are the edges in such a topology. The parent PCE does not know the topology of each child domain (King & Farrel, 2009). Even though the end-to-end path resulting from this architecture reaches a higher level of optimality, it largely increases the number of control messages exchanged between PCEs and therefore problems of scalability may occur.

King, D. and Farrel, A. “The Application of the PCE Architecture to the Determination of a Sequence of Domains in MPLS &GMPLS,” IETF draft draft-king-pce-hierarchy-fwk-03.txt, Dec. 2009. http://tools.ietf.org/html/draft-king-pce-hierarchy-fwk-00